Sr. ISP Engineer
OmniVision Technologies Inc
 Santa Clara, CA

In this position, you will lead a team to develop and design the leading edge CMOS image sensor.


  • Participate in chip level architecture definition, including analog interface/control, image data processing, power, performance, and area trade-offs.
  • Work with back-end team closely in floor planning, timing closure, and DFT.
  • Full-chip integration and verification.
  • Chip bring-up, validation, and debugging.


  • Minimum MSEE, or equivalent, plus 5years of experience OR BSEE, or equivalent, plus 6 years of digital design experience
  • Extensive knowledge of all aspects of chip development: from design specification, architecture definition, low-power design, tape-out, chip validation, chip debugging, mass production, to customer support.
  • In depth hands-on experience in ASIC design flow: RTL coding, simulation, synthesis, static timing analysis, formality verification, DFT.
  • Extensive knowledge of peripheral interface: MIPI, USB, I2C, SPI.
  • Experience in design verification and modeling using SystemVerilog, SystemC, Python, and Perl.
  • Extensive knowledge of SOC.
  • Extensive knowledge of CMOS Image Sensor and image signal processing (ISP).