ASIC Digital Design Engr, Sr Staff

Synopsys, Inc. California, MD
Job Description and Requirements

In this role you will help to define the next generation of Synopsys' industry-leading DDR IP products. You must take initiative to drive the architecture forward, including getting your hands dirty writing firmware, writing RTL, and running various tools to implement and verify the design.

Responsibilities:

* Track and contribute to standards development at JEDEC and DFI standards bodies

* Define the feature sets of new and evolving products

* Write high-level digital and mixed-signal design specifications for engineers to implement

* Guide verification teams and review test plans

* Silicon debug and simulation debug

* Provide pre-sales technical backup to the sales team

Requirements:

* 15+ years experience architecting and designing mixed-signal IP or processors

* Strong foundational understanding of digital, mixed-signal, and analog design

* Familiarity with industry standards development processes, programming languages, and tools

* Strong debug skills are a must, including hands-on silicon debug experience

* Work effectively both independently and collaboratively, according to each situation

* Independently resolves a wide range of issues in creative ways on a regular basis

* A strong desire to learn and explore new technologies and demonstrate good analysis and problem-solving skills