Join our pre-silicon verification team and work closely with digital/analog designers, applications engineers and manufacturing test to support both pre-silicon verification and post silicon validation efforts.
- Develop verification planning for mixed signal designs
- Develop testbenches for mixed signal designs
- Employ failure analysis techniques
- Review coverage analysis and population
- Develop digital/mixed-signal modeling
- Use directed/constraint-random test generation and flow development
Required Skills and Qualifications
- Requires a MSEE/MSCS and/or 5 years of verification experience preferably in mixed signal products
- Strong background with HDLs (e.g. Verilog, VHDL) and HVLs (e.g. SystemVerilog/OVM, UVM, AVM, Vera, e) required
- Must have solid scripting skills with Matlab, Perl, Unix/Linux shell, TCL, and need to be able to write and debug analog behavioral models in Verilog, Verilog-A, and/or Verilog-AMS
Preferred Skills and Qualifications
- Knowledge of signal processing and Verilog Assertions are also a plus
- The proven ability to invent, evaluate, debug, and improve a verification process is preferred for this position
This position is located in Austin, TX
Cirrus Logic is an Equal Opportunity/Affirmative Action Employer. We strive to select the best qualified applicant for any opening and to reward employees based on their skills, experience and performance. We do not discriminate on the basis of race, national origin, pregnancy status, marital status, gender, age, religion, physical or mental disability, medical condition, veteran status, sexual orientation, genetic information or any other characteristic protected by law.